This page contains photos and a few details of a working 6502 computer running at 1.8MHz with 16kB ROM, 32kB RAM and serial I/O, all built on 2 interlocking Perf+ protoboards.
I first saw a 6502 computer design in an electronic magazine back in the early 80's when I was a kid. I desperately wanted to build one, but growing up in a family with a transient lifestyle throughout Asia meant it wasn't feasible at the time. This project has a been a chance for me to roll back the clock and enjoy building the machine I so badly wanted all those years ago.
The design of this circuit is not my own, I pretty much copied it verbatim from Grant Searle's web site. No need for the flip-flop or MAX232 chips, so I ditched those. I was also seeing a lot of noise on the power rails so I added a 1000uF electrolytic capacitor across them. If you're in any way into this kind of retro computing then head on over to Grant's homebuilt electronics site for details of his original 6502 project and many others, it's a great resource with a heap of really cool projects.
One area where I did deviate from doing things proper "old-skool" was the decision to build the project on Perf+, a decidedly more recent technology. Invented by Ben Wang and originally launched on Kickstarter, Perf+ is a type of perfboard where traces run between the rows of holes horizontally along one side and vertically down the other. The holes can be easily connected to their neighbouring traces with a dab of solder, and like regular Perfboard the traces themselves can be cut. Using a combination of these techniques it's possible to wire up surprisingly complex circuits. I was one of the original backers of Perf+ and quickly discovered that anything but the most simple circuits becomes very difficult for me to follow. To that end I wrote Perfy, a simple editor to assist in the design of Perf+ circuits which also lets you know where solder points and trace cuts need to be made. Here's what the boards for this project look like in the editor:
And here's how they translate to the hardware itself. Not a terribly high component density compared to other projects I've built on Perf+ but a challenging circuit to route regardless. There's a 16-bit address bus, an 8-bit data bus and a couple dozen control/power lines all shared between the CPU, RAM, ROM, UART chip, addressing logic, clock generation and reset circuitry. And as is usually the case with Perf+, no jumpers!
The key to routing this project was the somewhat unconventional use of header/pins running horizontally along the middle of each board. This is actually the address bus...placing it there instead of on an edge (say) allowed me to align chips on both layers to either side of it in ways that maximized how the pins all lined up with each other. The apparently "empty" space on the the top layer to the right of the 6502 and EPROM is used to carry the data bus along the entire right edge of the board. In addition to allowing those top chips to tap into it directly it also allowed me to duplicate the data bus headers along both the top and bottom edge which in turn greatly assisted in breaking those signals out on the bottom layer where they were needed. The short row of pins at the middle of the top edge of the boards employs a similar tactic for the upper 8 address pins, exploiting the fact that the pinouts for the EPROM and RAM chips are virtually identical.
Here's a side view of the two boards mated together. One of the ideas I'm currently toying with is developing a third board with a keyboard and video display interface, by using Arduino shield pins it could slide nicely in between these two layers.
The EPROM is currently loaded with OSI BASIC, here's a screenshot of the boot-up sequence and the entering of a simple program.
And here it is running Hamurabi, one of the very first computer games I ever played all the way back in...1982 maybe?
This is what you do when you need to burn an EPROM for a single project and don't want to fork out $50 and wait 6 weeks for a programmer to arrive from China. The green board is an Arduino Mega Mini, after a couple of nights pouring over the EPROM data sheets I was able to write some code to upload the firmware. Fortunately I had ordered two of the ROM chips so I "practised" on one and then once I was confident the code worked I burned the firmware into the other. One problem I encountered was that the 27xxx EPROM chips need around 12.5V for programming but I only had a 15V power supply, so 2 LEDs and a signal diode are used to drop the voltage to the required range. Of course, this resulted in my "practice" EPROM being corrupted, so until I get a proper UV EPROM eraser I'm using the biggest (and slowest) eraser we have down here in Australia....
If anyone's interested in reproducing this project then all you really need is the Perfy design files for each of the boards, the firmware and other files from Grant Searle's page and the BOM below. All prices are what I paid for them on eBay in USD:
Thanks for checking out my project, hope you like it and a big thanks to Grant Searle, Ben Wang and the many others that have done the real work and made their projects publicly available. Cheers!